Keynote Speakers

The Superconducting Quantum Materials and Systems Center (SQMS) is one of the five national quantum information science research centers of the U.S. Department of Energy. SQMS brings the power of DOE laboratories, together with industry, academia and other federal entities, to achieve transformational advances in the major cross-cutting challenge of understanding and eliminating the decoherence mechanisms in superconducting 2D and 3D devices, with the final goal of enabling construction and deployment of superior quantum systems for computing and sensing. SQMS combines the strengths of an array of experts and world-class facilities towards these common goals.

Italy has supported an ambitious plan on High Performance Computing, Big Data and Quantum Computing with a relevant section on Quantum Computation (ICSC), supported by Piano Nazionale di Ripresa e Resilienza (PNRR). Various hardware platforms have been promoted including the superconducting one. Napoli has a long-standing experience on weak superconductivity and superconducting electronics supported by several international collaborations and has represented the ideal candidate to assemble the superconducting ICSC quantum computer. The initial promise was to build a quantum computer based on a 5-qubits quantum processor by the end of the project (spring 2026) to be available for all partners, which include major Italian Research Centers, Universities and Italian companies.  We are currently working on a 24-qubits processor produced by Quantware aiming at a QPU with more than 40-qubits by the end of year. This remarkable effort in hardware solutions in collaboration also with leading companies like SEEQC and Quantware has promoted intensive research for novel quantum components, ranging from an innovative type of qubits based on ferromagnetic Josephson junctions to qubit readout based on Josephson digital phase detector compatible with single-flux-quantum (SFQ) classical circuits. Superconducting quantum technologies have been also supported by another measure of PNRR through the National Quantum Science and Technology Institute (NQSTI). Here targets are mostly single superconducting components useful for applications and fundamental science.  The diversity in Josephson junctions opens ‘horizons' and much is happening.

Quantum computers are not yet able to tackle practical computational problems because current prototypes only offer too few (<1000) quantum bits (qubits) compared to the millions required for future applications. To follow and support such a growth in quantum-processor complexity, the electrical interface required for controlling and reading the qubits must also scale accordingly. In particular, wiring an increasing number of cryogenic qubits to their room-temperature control electronics will soon hit a brick wall due to the sheer size of the required wires, their cost, and their limited reliability. Such an interconnect bottleneck can be alleviated by operating a cryogenic electronic controller close to the qubits. Realizing such a vision comes, however, with several challenges, as it requires highly complex electronics able to operate at cryogenic temperatures and dissipate very low power to be compatible with the cooling budget of practical refrigerators while delivering high enough performance (in terms of control signal purity, readout sensitivity, and speed) not to limit the quality of the quantum operations.

One of the most developed technologies for quantum computing uses superconducting transmon qubits operating at ~10 mK temperatures. In this talk we will briefly discuss the theory and operation of these transmons and then focus on the use of cryoCMOS electronics for controlling this technology.

Since these qubits operate deep within a dilution refrigerator, it appears advantageous to put much of the control electronics in the cryostat, as close to the qubits as is reasonably feasible, to improve system integration and reduce the amount of wiring coming out of the cryostat. To this end, we have been exploring the use of 14nm CMOS operating at or near the 4 K stage in the cryostat.  Testsites have been fabricated including arrays of individual FETs for IV measurements and other active circuit elements, and these have been measured over temperature.  Results of this characterization will be discussed, including IV curve data and noise in current mirrors.  Using this 14nm technology, we have also designed, built, and tested a semi-autonomous qubit state controller (QSC) chip, as well as a broadband DAC for controlling flux-tunable qubits.  This QSC contains a general-purpose digital processor with special instructions for waveform generation as well as a single sideband upconversion I/Q mixer-based RF arbitrary waveform generator.  The results of our experiences in using this QSC will be presented.

Semiconductors, superconductors, and photonics are often studied as separate subjects by separate communities. Yet immense opportunities for technological progress reside at the confluence of these subjects. For example, superconducting nanowire single-photon detectors have excellent performance metrics such as high detection efficiency, broad range of wavelength sensitivity, low timing jitter, low dark counts, and low dead time. By integrating these detectors with superconducting circuits based on Josephson junctions, we have shown that several new readout concepts become available. Integrating pixels can be achieved, pixels that convert photon arrival time to a stored supercurrent are possible, and it appears likely that such circuits will even enable these detectors to resolve the number of photons incident in a pulse. In these examples, superconducting electronic circuits serve to process the signals coming from photonic sensors, resulting in a stored supercurrent that contains information about quantities of interest that are difficult to ascertain by other means. To make such systems scalable and convenient for interfacing with room-temperature electronics, further integrating monolithically with MOSFETs brings additional advantages. One can then transduce the stored supercurrent to charge on a capacitor, which can be read out with standard CMOS architectures, leading to scalable arrays of such sensors. We will present analysis of these circuits, including assessment of scalability, power consumption, and speed. We will then show experimental demonstrations of several of these properties.